1. Field of Invention
The present invention relates to a semiconductor device and the applications thereof, and more particularly relates to an electrostatic discharge (ESD) protection device and the applications thereof.
2. Description of Related Art
ESD is a transient process of high energy transformation from external to internal of an integrated circuit (IC) when the IC is floated. Several hundred or even several thousand volts are transferred during ESD stress. Such high voltage transformation will break down the gate oxide of an input stage and cause circuit error. As the thickness of gate oxide is scaled down constantly, it is more and more important that a protected circuit or device must be designed to protect the gate oxide and to discharge ESD stress.
One solution to the problem of ESD, a device for dispersing the ESD current into earth ground is integrated into the IC. For example, a gate ground n-type metal-oxide-semiconductor (GGNMOS) has been well known serves as an effective ESD protection device.
The GGNMOS is based on snapback mechanism. When the voltage reaches a level beyond the IC normal operation due to ESD zapping, the snapback mechanism enables the GGNMOS to conduct a high level ESD current between its drain and source and subsequently directs the ESD current into the earth ground. To increase the tolerance for ESD current, a GGNMOS with a great feature size is typically adopted. Furthermore, in order to conserve the IC layout region, the GGNMOS is designed as a multi-finger structure having a plurality of finger elementary transistors.
However, because each of the elementary transistors has different substrate resistance due to their different connection arrangements, the elementary transistors may not turn on uniformly triggered by the ESD stress. In other words, while the ESD zapping occurs, some elementary transistors may firstly turn on, and immediately breakdown with the onset of secondary snapback and the other elementary transistors may be inactive to contribute the ESD protection (which is referred as “latch up”). Accordingly, the ESD current can not be conducted into earth ground uniformly by all the finger elementary transistors, and the tolerance for ESD current of the GGNMOS cannot be scaled linearly with the device width. Therefore, how to enable each of the finger elementary transistors uniformly dispersing ESD current is still a challenge to the art.